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Silent chip defects can lead to data corruption in modern computers

Computers are often celebrated for their precision and speed. But researchers and hyperscale data center operators are warning of a growing threat that calls into question one of the core promises of computing: correctness. The problem is called Silent Data Corruption (SDC) – a phenomenon in which hardware failures cause programs to produce incorrect results without crashing, throwing an error, or leaving any visible trace.

The invisible threat in modern chips

At the center of concern are silicon defects in CPUs, GPUs and AI accelerators. These defects can arise during chip design or manufacturing, or can develop later due to aging or environmental factors. While manufacturers verify most defects, even the most rigorous production tests can only detect an estimated 95 to 99% of modeled defects. Some faulty chips inevitably make their way into the field.

In certain cases, these defects lead to visible failures such as system crashes. But even more worrying are silent errors. Here, a faulty logic gate or a faulty arithmetic unit can lead to an incorrect value during execution. If this value propagates through the program without triggering detection mechanisms, the system completes the task and returns incorrect output – with no indication that anything went wrong.

For decades, many believed that SDCs were rare, almost mythical events. However, major hyperscale operators such as Meta, Google and Alibaba have disclosed that around one in 1,000 CPUs in their fleets can cause silent corruption under certain conditions. Similar concerns have been reported with GPUs and AI accelerators.

Correctness is a fundamental property of computing. Whether processing financial transactions, performing AI inference, or managing infrastructure, systems are expected to deliver accurate results within strict timelines.

Silent corruption undermines this trust. Unlike crashes, which are immediately visible and investigated immediately, SDCs change outputs silently. In data centers running millions of cores, even a low error rate can result in hundreds of incorrect program results per day.

The scale of modern computers exacerbates the problem

Huge parallel architectures like GPUs and AI accelerators contain thousands of computing units. The more components a system has, the higher the statistical probability that some of them are defective.

Directly measuring SDCs is almost impossible – by definition they are silent. The industry must therefore estimate its rates and weigh the costs of prevention. Detection and correction mechanisms exist, but they can significantly increase silicon area, energy consumption, and performance overhead.

Researchers are calling for multi-layered solutions, including improved manufacturing testing, fleet-level monitoring in data centers, smarter error estimation models, and hardware-software co-design approaches that contain errors before they propagate.

As computer systems become larger and faster, the challenge is clear: maintain speed and accuracy without prohibitive costs. In what some are calling a “Golden Age of Complexity,” ensuring that data processing remains trustworthy could become one of the industry’s defining technical challenges.

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